Analog-to-digital converters are widely used in signal processing applications to convert analog signals into digital representations. For example, the Harris Semiconductor model HI5905 is a 14 bit analog-to-digital converter that uses a switched capacitor based pipeline architecture. The pipeline stages are implemented using a fully differential operational amplifier stage which is intended to provide a voltage gain equal to eight. This voltage gain is achieved using a ratio of capacitors in an 8 to 1 ratio.
Two capacitors are typically used in the circuit to set the gain--an input capacitor connected between the input of the gain stage and the input of the amplifier, and a feedback capacitor connected between the input and output of the amplifier. The input capacitor may typically be formed from eight placements of a capacitor having the value of the feedback capacitor. Unfortunately, due to the matching properties of the capacitors, a ratio of 8 to 1 can be realized with only about a 10 bit level of accuracy.
To realize a 14 bit converter, for example, a trim algorithm is typically used to adjust a reference voltage to match the capacitor mismatch. A voltage reference trimming approach is described in U.S. Pat. No. 5,771,012 to Shu et al. and assigned to the assignee of the present invention. While the disclosed trimming approach represents a significant advance, its implementation may be relatively complex both in terms of the additional circuitry required, and in terms of the die probe hardware and software required.